Pre-Silicon Verification – The Newest Approach to Accelerating Time-to-Market of Advanced Computing Capabilities

Avery is noted for functional verification solutions and SystemVerilog/UVM Verification IP, system-level virtual platform co-simulation and hardware-assisted verification, and gate-level simulation sign-off solutions for SoC verification. Its Vice President of Worldwide Sales and Marketing Chris Browy and I discussed a range of functional verification topics a while back. A condensed version of our talk appears in a blog post on the SEMI website.

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